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Lowrance
Navico did an excellent job by writing obfuscated technical documentation, and confusing its customers. This page tries to sort things out.
Model names
Kiwi Sylvester Hobart Atlantis Cougar Hatchetfish Stingray2 Condor Cassius SonarHub
Mark-4 and Elite-4,5,7,9 HDI with GPS
Model name: Sylvester (sylvester4g, sylvester4,sylvester5,sylvester7,sylvester9)
The board design (Navico MX28) is based on i.MX28EVK running Linux and Qt-Embedded
CPU
Freescale i.MX28 454 Mhz
ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
Headers
Mark-4 (Elite-4 should have the same layout)
J1: 10 (5x2) pins, 2* 1 3 5 7 9 10 connected (JTAG for STM32 or i.MX28 ? ) J2: 5 pins, 1* 2 3 4 5_ ( high-frequency 3.3V signal on pins 2,3,4 -> may be SPI or boot mode?) J3: 4 pins, 1* 2 3 4_ (no data observed, may be debug UART or USB boot) J4: LCD connector J5: Power and NMEA connector J6: Sonar connector J7: ?
Elite-7
J1: Power and NMEA connector J2: 4 pins, 1* 2 3 4_ DEBUG UART J3: Sonar connector J4: 5 pins CAN (NMEA-2000) J5: 6 pins ETHERNET (not filled U17+T1) J6: 3 pins BURN IN CONN J7: 12 pins external microSD J8: LCD connector J9: 10 (5x2) pins, i.MX28 JTAG J10: J11: 5 pins, 1 2 3 4 5_ BOOT MODE RES CONFIG J12: 4 pins LCD backlight ? J13: 10 pins flatband built-in GPS module J14: 10 pins (5x2) SONAR (STM32) JTAG
RAM
Micron D9LHT MT47H64M16HR-25E (1Gbit=128MB=64x2MB DDR2)
Connected to EMI.
ram : addr=0x40000000 uboot : loadaddr=0x40008000 (generic) kernel: loadaddr=0x42000000 (+32MB) end : addr=0x48000000 (+128MB)
GPS
Connected to /dev/ttyS1 (AUART1, /dev/ttySP1)@115200
Teseo2 STA8088 (10Hz) is used on Elite9:
a328bf939e9aa077b2ea5117c881165d ./ELITE9/usr/share/vprog2/firmware_10hz.bin
Teseo1 STA8058 (1Hz) firmware (APPVER_2.1.4.5 ARM - Jun 01 2011 15:48:36) is used on all other devices:
f2495a27c7e52de8f8fc82a4d52e2be8 ./ELITE4/usr/share/vprog/firmware_1hz_noRTC.hex f2495a27c7e52de8f8fc82a4d52e2be8 ./ELITE5/usr/share/vprog/firmware_1hz_noRTC.hex f2495a27c7e52de8f8fc82a4d52e2be8 ./ELITE7/usr/share/vprog/firmware_1hz_noRTC.hex f2495a27c7e52de8f8fc82a4d52e2be8 ./MARK4//usr/share/vprog/firmware_1hz_noRTC.hex
Teseo1 STA8058 (5Hz) firmware (APPVER_2.1.4.5 ARM - Jul 15 2011 15:57:29)
75436b2d82fc8791db2f6a9bc0f7baaa /usr/share/vprog/firmware_5hz_noRTC.hex
External GPS antenna
Compatible with Mark-4, Elite-5, Elite-5 DSI, Elite-5 Gold, Elite-5m, and Elite-5m Gold. Lowrance LGC-16W Elite Series External GPS Antenna
Model: 000-00146-001 SKU: LM-LGC16W, Uses SMA connector.
External GPS receiver
Elite-7 and Elite-9 can use the standalone Point-1 000-11047-001 through CAN(NMEA-2000) connector. Point-1 has Teseo2 chipset.
CAN (NMEA 2000)
Supported through external connector only on Elite-7 and Elite-9.
can: raw protocol (rev 20090105) ? or STM32 ? MCP2515 ?
Sonar
Anadigm AN231E04 Dynamically Reconfigurable dpASP and STM32F205RCT6 microcontroller
International Rectifier IRFH5053
The sonar is using SSP2 port on iMX28. Firmware update over /dev/ttyS4 (AUART4, /dev/ttySP4)
b791508e5509399207c1cf82665bd8cf ./ELITE4/usr/share/firmware/cougar-sonar.bin b791508e5509399207c1cf82665bd8cf ./ELITE5/usr/share/firmware/cougar-sonar.bin b791508e5509399207c1cf82665bd8cf ./ELITE7/usr/share/firmware/cougar-sonar.bin b791508e5509399207c1cf82665bd8cf ./ELITE9/usr/share/firmware/cougar-sonar.bin b791508e5509399207c1cf82665bd8cf ./MARK4//usr/share/firmware/cougar-sonar.bin
3d4678962e5e122acbb4624c8903d34c ./ELITE7/usr/share/firmware/csm2-dsp2.bin 6e7600470af84daf154e64b7b1569225 ./ELITE4/usr/share/firmware/csm2-dsp2.bin 6e7600470af84daf154e64b7b1569225 ./ELITE5/usr/share/firmware/csm2-dsp2.bin 6e7600470af84daf154e64b7b1569225 ./ELITE9/usr/share/firmware/csm2-dsp2.bin 6e7600470af84daf154e64b7b1569225 ./MARK4//usr/share/firmware/csm2-dsp2.bin
Serial ports
mxs-duart.0: ttyAM0 at MMIO 0x80074000 (irq = 47 ) is a DebugUART console mxs-auart.0: ttySP0 at MMIO 0x8006a000 (irq = 112) is a mxs-auart.0 ttyS0 NMEA data out, AIS data in mxs-auart.1: ttySP1 at MMIO 0x8006c000 (irq = 113) is a mxs-auart.1 ttyS1 GPS data+fw update mxs-auart.2: ttySP2 at MMIO 0x8006e000 (irq = 114) is a mxs-auart.2 ttyS2 unused mxs-auart.3: ttySP3 at MMIO 0x80070000 (irq = 115) is a mxs-auart.3 ttyS3 unused mxs-auart.4: ttySP4 at MMIO 0x80072000 (irq = 116) is a mxs-auart.4 ttyS4 SONAR fw update
NMEA 0183
Intersil ISL8490EIZB RS-485/RS-422 Transceiver
NMEA RS232 output works as expected:
Yellow: TX (TX+ RS422) <--> RX RS232 Orange: RX (RX+ RS422) Shield: GND <--> GND RS232 Blue : TX (TX- RS422) Green : RX (RX- RS422)
For NMEA output, AIS input (bidirectional serial connection on /dev/ttyS0 (AUART0, /dev/ttySP0)) use
Yellow: TX (TX+ RS422) <--> RX RS232 Orange: RX (RX+ RS422) <--> TX RS232 Shield: GND <--> GND RS232 Blue : TX (TX- RS422) unused ? Green : RX (RX- RS422) <--> GND RS232
RS422 NMEA input is reported to be buggy, and needs a 100 nF capacitor:
Yellow: TX (TX+ RS422) Orange: RX (RX+ RS422) -||- 100nF <--> TX+ RS422 Shield: GND <--> GND Blue : TX (TX- RS422) Green : RX (RX- RS422) <--> TX- RS422
NAND
Samsung K9F4G08 (48pin=24x2 TSOP1 12x20mm ) 4Gbit = 512M x 8 Bits NAND Flash Memory i.MX GPMI NFC
(boothdr) 00000000 1M (uboot) 00100000 2M+256K (logo) 00380000 1M (kernel) 00480000 4M (rkernel) 00880000 4M (system) 00c80000 * END 20000000
On Sylvester:
(boothdr) 00000000 1M /dev/mtd0 (uboot) 00100000 2M+256K /dev/mtd1 used by update (boot.bin=mxsimage) (logo) 00380000 1M /dev/mtd2 (kernel) 00480000 4M /dev/mtd3 used by update (rkernel) 00880000 4M /dev/mtd4 (system) 00c80000 96M /dev/mtd5 (maps) 06880000 * /dev/mtd6 END 20000000
Mountable filesystems (MTD mapping unknown):
ubi0:root / ubi0:NOS /etc/NOS ubi0:home /home ubi1:factorydata /media/factorydata
Ethernet
FEC Ethernet Driver eth0: Freescale FEC PHY driver [Generic PHY] (mii_bus:phy_addr=0:00, irq=-1)
SD
The device can be booted from SD card (see i.MX28 manual), but the switch pin locations on the motherboard are not known. mxs-mmc mxs-mmc.0: mmc0: MXS SSP MMC DMAIRQ 82 ERRIRQ 96
Logs/AIS/ Logs/Radar/ Logs/Weather/ Logs/Sonar/
LCD
There are some reports that Mark-4 HDI has color LCD, so it is an Elite-4 HDI operating in BW mode.
Backlight: Texas Instruments TPS61183
BAckdoored "users"
root:$1$0O7Xg8IZ$Oi6H1ZtfXDwoTzATE6Jvm.:1:0::::: nos:$1$GSb8zSwQ$ukk1i1HG3CyCWSvA8jtrS0:1:0:99999::::
GPG keys for update images
$ gpg --keyring /tmp/MARK4/PIGGY/.gnupg/trustedkeys.gpg --list-keys /tmp/MARK4/PIGGY/.gnupg/trustedkeys.gpg --------------------------------------- pub 1024D/ECDC178E 2009-10-13 uid Navico update key #1 sub 2048g/E5EBAD66 2009-10-13 pub 1024D/B9FA9BB5 2009-10-13 uid Navico update key #2 pub 2048R/8F3DF432 2009-10-13 uid Navico update key #3
$ gpg --keyring /tmp/MARK4/PIGGY/.gnupg/trustedkeys.gpg --verify update.sh.asc update.sh gpg: Signature made Fri Feb 6 23:13:14 2015 CET using DSA key ID B9FA9BB5 gpg: Good signature from "Navico update key #2" gpg: WARNING: This key is not certified with a trusted signature! gpg: There is no indication that the signature belongs to the owner. Primary key fingerprint: 7326 4493 8738 E5D1 58A3 E46D CFBB D990 B9FA 9BB5
GPIO
| GPIOn | GPIOx | Pin Name | MUX | I=0/O=1 | ||||||
| 0/0_0 | 0 | GPMI D0 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 1/0_1 | 1 | GPMI D1 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 2/0_2 | 2 | GPMI D2 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 3/0_3 | 3 | GPMI D3 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 4/0_4 | 4 | GPMI D4 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 5/0_5 | 5 | GPMI D5 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 6/0_6 | 6 | GPMI D6 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 7/0_7 | 7 | GPMI D7 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 16/0_16 | 0x10 | GPMI CE0- | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 18/0_18 | 0x12 | CAN1_TX | 0x0800 | -1 | -1 | 3 | 1 | 0 | 1 | 2 |
| 19/0_19 | 0x13 | CAN1_RX | 0x0800 | -1 | -1 | 3 | 1 | 0 | 1 | 2 |
| 20/0_20 | 0x14 | GPMI RDY0 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 21/0_21 | 0x15 | GPMI RDY1 | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 22/0_22 | 0x16 | CAN0_TX | 0x1800 | -1 | -1 | 3 | 1 | 0 | 1 | 2 |
| 22/0_22 | 0x16 | CAN0_TX | 0x2000 | 1 | -1 | 3 | 1 | 0 | 1 | 2 |
| 23/0_23 | 0x17 | CAN0_RX | 0x1800 | -1 | -1 | 3 | 1 | 0 | 1 | 2 |
| 23/0_23 | 0x17 | CAN0_RX | 0x2000 | 1 | -1 | 3 | 1 | 0 | 1 | 2 |
| 24/0_24 | 0x18 | GPMI RD- | -1 | -1 | -1 | 1 | 0 | 2 | 1 | 2 |
| 25/0_25 | 0x19 | GPMI WR- | -1 | -1 | -1 | 1 | 0 | 2 | 1 | 2 |
| 26/0_26 | 0x1A | GPMI ALE | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 27/0_27 | 0x1B | GPMI CLE | -1 | -1 | -1 | 1 | 0 | 0 | 1 | 2 |
| 28/0_28 | 0x1C | GPMI RST- | -1 | -1 | -1 | 1 | 0 | 2 | 1 | 2 |
| 32/1_0 | 0x20 | LCD_D00 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 33/1_1 | 0x21 | LCD_D01 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 34/1_2 | 0x22 | LCD_D02 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 35/1_3 | 0x23 | LCD_D03 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 36/1_4 | 0x24 | LCD_D04 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 37/1_5 | 0x25 | LCD_D05 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 38/1_6 | 0x26 | LCD_D06 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 39/1_7 | 0x27 | LCD_D07 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 40/1_8 | 0x28 | LCD_D08 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 41/1_9 | 0x29 | LCD_D09 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 42/1_10 | 0x2A | LCD_D10 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 43/1_11 | 0x2B | LCD_D11 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 44/1_12 | 0x2C | LCD_D12 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 45/1_13 | 0x2D | LCD_D13 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 46/1_14 | 0x2E | LCD_D14 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 47/1_15 | 0x2F | LCD_D15 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 48/1_16 | 0x30 | LCD_D16 | 0x1800 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 48/1_16 | 0x30 | LCD_ENABLE2 | 0x2000 | -1 | -1 | 1 | 3 | 0 | 1 | 0xA |
| 49/1_17 | 0x31 | LCD_D17 | 0x1800 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 49/1_17 | 0x31 | KEY_RIGHT | 0x2000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 50/1_18 | 0x32 | LCD_D18 | 0x1800 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 50/1_18 | 0x32 | KEY_LEFT | 0x2000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 51/1_19 | 0x33 | LCD_D19 | 0x1800 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 51/1_19 | 0x33 | IGPS_nRESET | 0x2000 | -1 | -1 | 7 | 3 | 0 | 1 | 0x1A |
| 52/1_20 | 0x34 | LCD_D20 | 0x1800 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 52/1_20 | 0x34 | IGPS_BOOTEN | 0x2000 | -1 | -1 | 7 | 3 | 0 | 1 | 0xA |
| 53/1_21 | 0x35 | LCD_D21 | 0x1800 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 53/1_21 | 0x35 | IGPS_BOOT0 | 0x2000 | -1 | -1 | 7 | 3 | 0 | 1 | 0xA |
| 54/1_22 | 0x36 | LCD_D22 | 0x1800 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 54/1_22 | 0x36 | IGPS_UAKEUP | 0x2000 | 1 | -1 | 7 | 3 | 0 | 1 | 0xA |
| 54/1_22 | 0x36 | IGPS_FORCE_ANT | 0x2000 | 2 | -1 | 7 | 3 | 0 | 1 | 0xA |
| 55/1_23 | 0x37 | LCD_D23 | 0x1800 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 55/1_23 | 0x37 | SNR_BTSTRP_EN | 0x2000 | -1 | -1 | 7 | 3 | 0 | 1 | 0xA |
| 56/1_24 | 0x38 | LCD_VSYNC | 0x1800 | -1 | -1 | 1 | 1 | 1 | 1 | 2 |
| 56/1_24 | 0x38 | SNR_nRESET | 0x2000 | -1 | -1 | 5 | 3 | 0 | 1 | 0xA |
| 56/1_24 | 0x38 | SNR_nRESET | 0x2000 | -1 | -1 | 6 | 3 | 0 | 1 | 0x1A |
| 57/1_25 | 0x39 | LCD_HSYNC | 0x1800 | -1 | -1 | 1 | 1 | 1 | 1 | 2 |
| 57/1_25 | 0x39 | LCD_HSYNC | 0x2000 | 2 | 0xA | 1 | 1 | 1 | 1 | 2 |
| 57/1_25 | 0x39 | LCD_HSYNC | 0x2000 | 4 | -1 | 1 | 1 | 1 | 1 | 2 |
| 57/1_25 | 0x39 | LCD_HSYNC | 0x2000 | 8 | -1 | 1 | 1 | 1 | 1 | 2 |
| 58/1_26 | 0x3A | LCD_DOTCLK | -1 | -1 | -1 | 1 | 1 | 1 | 1 | 2 |
| 59/1_27 | 0x3B | LCD_ENABLE | 0x1800 | -1 | -1 | 1 | 1 | 1 | 1 | 2 |
| 59/1_27 | 0x3B | LCD_ENABLE | 0x2000 | 1 | -1 | 1 | 1 | 1 | 1 | 2 |
| 59/1_27 | 0x3B | LCD_ENABLE | 0x2000 | 2 | -1 | 1 | 1 | 1 | 1 | 2 |
| 59/1_27 | 0x3B | LCD_ON_OFF | 0x2000 | 4 | -1 | 1 | 3 | 1 | 1 | 0x1A |
| 59/1_27 | 0x3B | LCD_ON_OFF | 0x2000 | 8 | -1 | 1 | 3 | 1 | 1 | 0x1A |
| 64/2_0 | 0x40 | SSP0_DATA0 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 7 |
| 65/2_1 | 0x41 | SSP0_DATA1 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 7 |
| 66/2_2 | 0x42 | SSP0_DATA2 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 7 |
| 67/2_3 | 0x43 | SSP0_DATA3 | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 7 |
| 68/2_4 | 0x44 | SSP0_DETECT2 | 0x2000 | -1 | -1 | 1 | 3 | 0 | 1 | 0xA |
| 68/2_4 | 0x44 | LCD MISO | +0x1800 | -1 | -1 | 3 | 1 | 0 | 1 | 2 |
| 69/2_5 | 0x45 | LCD SS0 | +0x1800 | -1 | -1 | 6 | 3 | 1 | 1 | 0x1A |
| 69/2_5 | 0x45 | KEY_ZOUT | 0x2000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 69/2_5 | 0x45 | LCD SS0 | +0x1800 | -1 | -1 | 1 | 1 | 1 | 1 | 0x12 |
| 70/2_6 | 0x46 | KEY_ENT | 0x2000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 70/2_6 | 0x46 | LCD_MOSI | +0x1800 | -1 | -1 | 3 | 1 | 0 | 1 | 2 |
| 71/2_7 | 0x47 | KEY_ZIN | 0x2000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 71/2_7 | 0x47 | LCD SCK | +0x1800 | -1 | -1 | 3 | 1 | 0 | 1 | 2 |
| 72/2_8 | 0x48 | SSP0_CMD | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 7 |
| 73/2_9 | 0x49 | SSP0_DETECT | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 7 |
| 74/2_10 | 0x4A | SSP0_SCK | -1 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 80/2_16 | 0x50 | SNR_CPU_SCK (SSP2_SCK) | 0x2000 | -1 | -1 | 2 | 0 | 0 | 1 | 2 |
| 80/2_16 | 0x50 | MCP2515 SCK (SSP2_SCK) | +0x0800 | -1 | -1 | 2 | 3 | 0 | 1 | 8 |
| 81/2_17 | 0x51 | SNR_CPU_MOSI (SSP2_MOSI) | 0x2000 | -1 | -1 | 2 | 0 | 0 | 1 | 2 |
| 81/2_17 | 0x51 | MCP2515 MOSI (SSP2_MOSI) | +0x0800 | -1 | -1 | 2 | 3 | 0 | 1 | 8 |
| 82/2_18 | 0x52 | SNR_CPU_MISO (SSP2_MISO) | 0x2000 | -1 | -1 | 2 | 0 | 0 | 1 | 2 |
| 82/2_18 | 0x52 | MCP2515 MISO (SSP2_MISO) | +0x0800 | -1 | -1 | 2 | 3 | 0 | 0 | 0 |
| 83/2_19 | 0x53 | SNR_CPU_nSS (SSP2_SS0) | 0x2000 | -1 | -1 | 2 | 0 | 1 | 1 | 7 |
| 83/2_19 | 0x53 | MCP2515 SS0 (SSP2_SS0) | +0x0800 | -1 | -1 | 2 | 3 | 1 | 1 | 0x18 |
| 84/2_20 | 0x54 | SYSTEMLINK0.OVERCURRENT | 0x0800 | -1 | -1 | 6 | 3 | 0 | 0 | 0 |
| 84/2_20 | 0x54 | KEY_PWR | 0x2000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 85/2_21 | 0x55 | SYSTEMLINK1.OVERCURRENT | 0x0800 | -1 | -1 | 6 | 3 | 0 | 0 | 0 |
| 85/2_21 | 0x55 | PWR_HOLD_ON | 0x2000 | -1 | -1 | 7 | 3 | 0 | 1 | 0x1A |
| 96/3_0 | 0x60 | SYSTEMLINK1.RX (AUART0_RX) | 0x0800 | -1 | -1 | 2 | 0 | 0 | 0 | 0 |
| 96/3_0 | 0x60 | CPU_422_RX (AUART0_RX) | 0x2000 | -1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 97/3_1 | 0x61 | SYSTEMLINK1.TX (AUART0_TX) | 0x0800 | -1 | -1 | 2 | 0 | 0 | 0 | 0 |
| 97/3_1 | 0x61 | CPU_422_TX (AUART0_TX) | 0x2000 | -1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 98/3_2 | 0x62 | SYSTEMLINK_OVERVOLTAGE | 0x0800 | -1 | -1 | 6 | 3 | 0 | 0 | 0 |
| 98/3_2 | 0x62 | CPU_SNR_BOOT_RX (AUART4_RX) | 0x2000 | -1 | -1 | 1 | 1 | 0 | 0 | 0 |
| 99/3_3 | 0x63 | PWR_ON | 0x0800 | -1 | -1 | 7 | 3 | 0 | 1 | 0xA |
| 99/3_3 | 0x63 | CPU_SNR_BOOT_TX (AUART4_TX) | 0x2000 | -1 | -1 | 1 | 1 | 0 | 0 | 0 |
| 100/3_4 | 0x64 | SYSTEMLINK0.RX (AUART1_RX) | 0x0800 | -1 | -1 | 2 | 0 | 0 | 0 | 0 |
| 100/3_4 | 0x64 | CPU_IGPS_RX (AUART1_RX) | 0x2000 | -1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 101/3_5 | 0x65 | SYSTEMLINK0.TX (AUART1_TX) | 0x0800 | -1 | -1 | 2 | 0 | 0 | 0 | 0 |
| 101/3_5 | 0x65 | CPU_IGPS_TX (AUART1_TX) | 0x2000 | -1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 105/3_9 | 0x69 | USB_PWR_EN_HACK | -1 | -1 | -1 | 6 | 3 | 0 | 1 | 0xA |
| 112/3_16 | 0x70 | DUART.RX | -1 | -1 | -1 | 2 | 2 | 0 | 0 | 0 |
| 113/3_17 | 0x71 | DUART.TX | -1 | -1 | -1 | 2 | 2 | 0 | 0 | 0 |
| 114/3_18 | 0x72 | LCD_BACKLIGHT | 0x1800 | -1 | -1 | 1 | 3 | 0 | 1 | 0x1A |
| 114/3_18 | 0x72 | LCD_BACKLIGHT (PWM_2) | 0x1800 | -1 | -1 | 2 | 0 | 1 | 1 | 2 |
| 114/3_18 | 0x72 | GPIO3_18 | 0x2000 | -1 | -1 | 1 | 3 | 0 | 1 | 0x1A |
| 114/3_18 | 0x72 | AUDIO_PWM (PWM_2) | 0x2000 | -1 | -1 | 2 | 0 | 1 | 1 | 2 |
| 116/3_20 | 0x74 | KEY_UP | 0x2000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 116/3_20 | 0x74 | RED_LED_PWM | 0x0800 | -1 | -1 | 1 | 3 | 0 | 1 | 0xA |
| 116/3_20 | 0x74 | RED_LED_PWM (PWM_3) | 0x1800 | -1 | -1 | 2 | 1 | 1 | 1 | 7 |
| 117/3_21 | 0x75 | KEY_DWN | 0x2000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 117/3_21 | 0x75 | WHITE_LED_PWM (PWM_4) | 0x1000 | -1 | -1 | 2 | 1 | 1 | 1 | 2 |
| 117/3_21 | 0x75 | TONE_PWM (PWM_4) | 0x0800 | -1 | -1 | 2 | 1 | 1 | 1 | 7 |
| 118/3_22 | 0x76 | CLK_SNR_16MHZ (PWM_5) | 0x2000 | -1 | -1 | 1 | 1 | 0 | 1 | 2 |
| 118/3_22 | 0x76 | CAN_CCLK ? (PWM_5) | 0x0800 | -1 | -1 | 2 | 1 | 1 | 1 | 2 |
| 119/3_23 | 0x77 | VOLUME_PWM (PWM_6) | 0x0800 | -1 | -1 | 2 | 1 | 1 | 1 | 7 |
| 119/3_23 | 0x77 | LCD_BACKLIGHT_EN | 0x1000 | -1 | -1 | 6 | 3 | 0 | 1 | 0x1A |
| 119/3_23 | 0x77 | LCD_BK_DIM_PWM (PWM_6) | 0x2000 | 4 | -1 | 1 | 1 | 1 | 1 | 6 |
| 119/3_23 | 0x77 | LCD_BK_DIM_PWM (PWM_6) | 0x2000 | 8 | -1 | 1 | 1 | 1 | 1 | 6 |
| 119/3_23 | 0x77 | KPD_BK_DIM_PWM | 0x2000 | 3 | -1 | 1 | 3 | 0 | 1 | 0xA |
| 119/3_23 | 0x77 | KPD_BK_DIM_PWM (PWM_6) | 0x2000 | 3 | -1 | 2 | 1 | 1 | 1 | 6 |
| 120/3_24 | 0x78 | KEY_MENU | 0x2000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 120/3_24 | 0x78 | EXT_HORN_DRV | 0x0800 | -1 | -1 | 6 | 3 | 0 | 1 | 0xA |
| 121/3_25 | 0x79 | KEY_PAGES | 0x2000 | 2 | -1 | 2 | 3 | 0 | 0 | 5 |
| 121/3_25 | 0x79 | KEY_PAGES | 0x2000 | 4 | -1 | 2 | 3 | 0 | 0 | 5 |
| 121/3_25 | 0x79 | KEY_PAGES | 0x2000 | 8 | -1 | 2 | 3 | 0 | 0 | 5 |
| 121/3_25 | 0x79 | LED_PWRSPLY_EN | 0x0800 | -1 | -1 | 1 | 3 | 0 | 1 | 0x1A |
| 122/3_26 | 0x7A | LCD_BK_DIM_PWM (PWM_7) | 0x2000 | -1 | -1 | 1 | 1 | 1 | 1 | 6 |
| 122/3_26 | 0x7A | WHITE_LED_PWM | 0x0800 | -1 | -1 | 1 | 3 | 0 | 1 | 0xA |
| 122/3_26 | 0x7A | MENU_LED_PWM (PWM_7) | 0x1000 | -1 | -1 | 2 | 1 | 1 | 1 | 2 |
| 122/3_26 | 0x7A | WHITE_LED_PWM (PWM_7) | 0x0800 | -1 | -1 | 2 | 1 | 1 | 1 | 7 |
| 123/3_27 | 0x7B | KEY_PAGES | 0x2000 | 1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 123/3_27 | 0x7B | WAKE_PWR_IN | 0x0800 | -1 | -1 | 6 | 3 | 0 | 0 | 0 |
| 124/3_28 | 0x7C | SD_PWR_EN | -1 | -1 | -1 | 1 | 3 | 0 | 1 | 0xA |
| 125/3_29 | 0x7D | LCD_CNTRST_PWM (PWM_4) | 0x2000 | 3 | -1 | 1 | 0 | 1 | 1 | 7 |
| 125/3_29 | 0x7D | USB_PWR_EN | 0x1000 | -1 | -1 | 6 | 3 | 0 | 1 | 0x1A |
| 126/3_30 | 0x7E | LCD_RESET | 0x1800 | -1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 126/3_30 | 0x7E | LCD_RESET | 0x2000 | 1 | -1 | 1 | 0 | 1 | 1 | 2 |
| 126/3_30 | 0x7E | LCD_RESET | 0x2000 | 2 | 5 | 1 | 0 | 1 | 1 | 2 |
| 126/3_30 | 0x7E | LCD_VSYNC | 0x2000 | 2 | 0xA | 1 | 1 | 1 | 1 | 2 |
| 126/3_30 | 0x7E | LCD_VSYNC | 0x2000 | 4 | -1 | 1 | 1 | 1 | 1 | 2 |
| 126/3_30 | 0x7E | LCD_VSYNC | 0x2000 | 8 | -1 | 1 | 1 | 1 | 1 | 2 |
| 128/4_0 | 0x80 | ETH_MDC | 0x2000 | 1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 128/4_0 | 0x80 | KEY_PAGET | 0x0800 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 129/4_1 | 0x81 | ETH_MDIO | 0x2000 | 1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 129/4_1 | 0x81 | KEY_UP | 0x0800 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 130/4_2 | 0x82 | ETH_CRS_DV | 0x2000 | 1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 130/4_2 | 0x82 | KEY_ENTER | 0x0800 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 130/4_2 | 0x82 | BACKLIGHT_SPI_CS | 0x2000 | 2 | -1 | 1 | 3 | 0 | 1 | 0x1A |
| 131/4_3 | 0x83 | BACKLIGHT_ST7_nRESET | 0x2000 | 2 | 5 | 1 | 3 | 0 | 1 | 0xA |
| 131/4_3 | 0x83 | BKLGHT_EN | 0x2000 | 2 | 0xA | 1 | 3 | 0 | 1 | 0x1A |
| 131/4_3 | 0x83 | BKLGHT_EN | 0x2000 | 4 | -1 | 1 | 3 | 0 | 1 | 0x1A |
| 131/4_3 | 0x83 | BKLGHT_EN | 0x2000 | 8 | -1 | 1 | 3 | 0 | 1 | 0x1A |
| 131/4_3 | 0x83 | ETH_RXD0 | 0x2000 | 1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 131/4_3 | 0x83 | KEY_DWN | 0x0800 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 132/4_4 | 0x84 | FPGA_TRST | 0x2000 | 2 | -1 | 1 | 3 | 0 | 1 | 0xA |
| 132/4_4 | 0x84 | ETH_RXD1 | 0x2000 | 1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 132/4_4 | 0x84 | KEY_MENU | 0x1000 | -1 | -1 | 2 | 3 | 0 | 0 | 5 |
| 134/4_6 | 0x86 | BKLIGHT_SPI_MISO | 0x2000 | 2 | -1 | 1 | 3 | 0 | 0 | 5 |
| 134/4_6 | 0x86 | ETH_TX_EN | 0x2000 | 1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 135/4_7 | 0x87 | BACKLIGHT_SPI_MOSI | 0x2000 | 2 | -1 | 1 | 3 | 0 | 1 | 0xA |
| 135/4_7 | 0x87 | ETH_TXD0 | 0x2000 | 1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 135/4_7 | 0x87 | CAN_INT | 0x0800 | -1 | -1 | 2 | 3 | 0 | 0 | 0 |
| 136/4_8 | 0x88 | BACKLIGHT_SPI_CLK | 0x2000 | 2 | -1 | 1 | 3 | 0 | 1 | 0xA |
| 136/4_8 | 0x88 | ETH_TXD1 | 0x2000 | 1 | -1 | 1 | 0 | 0 | 0 | 0 |
| 136/4_8 | 0x88 | CAN_RESET_N | 0x0800 | -1 | -1 | 2 | 3 | 0 | 1 | 0xA |
| 144/4_16 | 0x90 | ETH_CLK | 0x2000 | 1 | -1 | 1 | 0 | 0 | 0 | 0 |
CAN_RESET_N MCP2515 MOSI MCP2515 MISO MCP2515 SCK MCP2515 SS0
LCD MOSI LCD MISO LCD SCK LCD SS0
SSP0_DATA0 SSP0_DATA1 SSP0_DATA2 SSP0_DATA3 SSP0_CMD SSP0_DETECT SSP0_DETECT2 SSP0_SCK SD_PWR_EN
LCD_D00 LCD_D01 LCD_D02 LCD_D03 LCD_D04 LCD_D05 LCD_D06 LCD_D07 LCD_D08 LCD_D09 LCD_D10 LCD_D11 LCD_D12 LCD_D13 LCD_D14 LCD_D15 LCD_D16 LCD_D17 LCD_D18 LCD_D19 LCD_D20 LCD_D21 LCD_D22 LCD_D23 LCD_RESET LCD_VSYNC LCD_HSYNC LCD_ENABLE LCD_ON_OFF LCD_DOTCLK LCD_ENABLE2
BACKLIGHT_SPI_CS LCD_BACKLIGHT 167 LCD_BACKLIGHT_EN LCD_BK_DIM_PWM BACKLIGHT_ST7_nRESET BKLGHT_EN FPGA_TRST
BKLIGHT_SPI_MISO BACKLIGHT_SPI_MOSI BACKLIGHT_SPI_CLK LCD_CNTRST_PWM
IGPS_nRESET 51 IGPS_BOOTEN 52 IGPS_BOOT0 53 IGPS_UAKEUP 54 ? IGPS_FORCE_ANT
CPU_IGPS_RX /dev/ttyS1 CPU_IGPS_TX
SNR_BTSTRP_EN 55 BOOT0_GPIO SNR_nRESET 56 CPU_SNR_BOOT_RX CPU_SNR_BOOT_TX CLK_SNR_16MHZ SNR_CPU_MOSI SNR_CPU_MISO SNR_CPU_SCK SNR_CPU_nSS
CPU_422_RX /dev/ttyS0 ? CPU_422_TX
ETH_CLK - ETH_MDC - ETH_MDIO - ETH_CRS_DV - ETH_RXD0 - ETH_RXD1 - ETH_TX_EN - ETH_TXD0 - ETH_TXD1 -
KEY_PAGET KEY_UP + KEY_ENTER + KEY_DWN + KEY_MENU + KEY_RIGHT + KEY_LEFT + KEY_PAGES + KEY_ZOUT + KEY_ENT KEY_ZIN + KEY_PWR +
PWR_ON WAKE_PWR_IN PWR_HOLD_ON LED_PWRSPLY_EN WHITE_LED_PWM RED_LED_PWM MENU_LED_PWM KPD_BK_DIM_PWM
GPMI D0 GPMI D1 GPMI D2 GPMI D3 GPMI D4 GPMI D5 GPMI D6 GPMI D7 GPMI CE0- GPMI RDY0 GPMI RDY1 GPMI RD- GPMI WR- GPMI ALE GPMI CLE GPMI RST-
DUART.RX /dev/ttyAM0 DUART.TX
SYSTEMLINK1.RX SYSTEMLINK1.TX SYSTEMLINK0.RX SYSTEMLINK0.TX
SYSTEMLINK1.OVERCURRENT SYSTEMLINK0.OVERCURRENT SYSTEMLINK_OVERVOLTAGE
CAN1_TX CAN1_RX
CAN0_TX CAN0_RX CAN_CCLK CAN_INT
VOLUME_PWM TONE PWM AUDIO_PWM 167? EXT_HORN_DRV
USB_PWR_EN USB_PWR_EN_HACK
Raymarine
Dragonfly 4 Pro
SD
The SD card stores any exported tracks, waypoints, charts etc. It is also used for firmware updates.
Lighthouse_id.txt Raymarine/My Data/*.gpx
Raymarine GPX format
The Dragonfly 4 uses a version of GPX 1.1 with extensions for water depth and water temperature. Water depth seems to be logged in Meters, at least if one selects Meters as the depth unit. Temperature is stored in Kelvin, even if temperature unit was set to Celsius. It looks like the writing of the GPX file is sometimes corrupted, several <trkseg/> turns up without a start.
/*
* <?xml version="1.0" encoding="UTF-8"?>
* <gpx xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" version="1.1" xmlns="http://www.topografix.com/GPX/1/1" creator="Raymarine" xmlns:raymarine="http://www.raymarine.com" xsi:schemaLocation="http://www.raymarine.com http://raymarine.com/gpx_schema/RaymarineGPXExtensions.xsd http://www.topografix.com/GPX/1/1 http://www.topografix.com/GPX/1/1/gpx.xsd http://www.topografix.com/GPX/Private/TopoGrafix/0/1 http://www.topografix.com/GPX/Private/TopoGrafix/0/1/topografix.xsd" xmlns:topografix="http://www.topografix.com/GPX/Private/TopoGrafix/0/1">
* <trk>
* <name>Track 1</name>
* <extensions>
* <raymarine:Colour>Purple</raymarine:Colour>
* <raymarine:GUID>c900-e237-0000-684f</raymarine:GUID>
* </extensions>
* <trkseg>
* <trkpt lon="115.5100508127362" lat="-8.529943645353292">
* <extensions>
* <raymarine:WaterTemp>304.35</raymarine:WaterTemp>
* <raymarine:WaterDepth>6.81</raymarine:WaterDepth>
* </extensions>
* </trkpt>
* <trkpt lon="115.5100509803742" lat="-8.52994397911441">
* <extensions>
* <raymarine:WaterTemp>304.35</raymarine:WaterTemp>
* <raymarine:WaterDepth>6.81</raymarine:WaterDepth>
* </extensions>
* </trkpt>
* </trkseg>
* <trkseg/>
* <trkseg/>
* </trk>
* </gpx>
*/